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connection diagram 8-pin plastic mini-dip (n), soic (r) and cerdip (q) packages offset null 1 2 3 4 8 7 6 5 top view ad810 disable +v s output offset null ?n +in ? s rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a low power video op amp with disable ad810 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 features high speed 80 mhz bandwidth (3 db, g = +1) 75 mhz bandwidth (3 db, g = +2) 1000 v/ m s slew rate 50 ns settling time to 0.1% (v o = 10 v step) ideal for video applications 30 mhz bandwidth (0.1 db, g = +2) 0.02% differential gain 0.04 8 differential phase low noise 2.9 nv/ ? hz input voltage noise 13 pa/ ? hz inverting input current noise low power 8.0 ma supply current max 2.1 ma supply current (power-down mode) high performance disable function turn-off time 100 ns break before make guaranteed input to output isolation of 64 db (off state) flexible operation specified for 6 5 v and 6 15 v operation 6 2.9 v output swing into a 150 v load (v s = 6 5 v) applications professional video cameras multimedia systems ntsc, pal & secam compatible systems video line driver adc/dac buffer dc restoration circuits product description the ad810 is a composite and hdtv compatible, current feedback, video operational amplifier, ideal for use in systems such as multimedia, digital tape recorders and video cameras. the 0.1 db flatness specification at bandwidth of 30 mhz (g = +2) and the differential gain and phase of 0.02% and 0.04 (ntsc) make the ad810 ideal for any broadcast quality video system. all these specifications are under load conditions of 150 w (one 75 w back terminated cable). the ad810 is ideal for power sensitive applications such as video cameras, offering a low power supply current of 8.0 ma max. the disable feature reduces the power supply current to only 2.1 ma, while the amplifier is not in use, to conserve power. furthermore the ad810 is specified over a power supply range of 5 v to 15 v. the ad810 works well as an adc or dac buffer in video systems due to its unity gain bandwidth of 80 mhz. because the ad810 is a transimpedance amplifier, this bandwidth can be maintained over a wide range of gains while featuring a low noise of 2.9 nv/ ? hz for wide dynamic range applications. 0.10 0 15 0.03 0.01 6 0.02 5 0.06 0.04 0.05 0.07 0.08 0.09 14 13 12 11 10 9 8 7 0.20 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 gain phase gain = +2 r f = 715 w r l = 150 w f c = 3.58mhz 100 ire modulated ramp supply voltage ??volts differential gain ?% differential phase ?degrees differential gain and phase vs. supply voltage gain = +2 r l = 150 w ?.5v ?v ?.5v phase gain 0 ? 10 100 ? ? ? ? 1 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 closed-loop gain ?db phase shift ?degrees frequency ?mhz ?v v s = ?5v v s = ?5v closed-loop gain and phase vs. frequency, g = +2, r l = 150, r f = 715 w
rev. a C2C ad810Cspecifications (@ t a = +25 8 c and v s = 6 15 v dc, r l = 150 v unless otherwise noted) ad810a ad810s 1 parameter conditions v s min typ max min typ max units dynamic performance 3 db bandwidth (g = +2) r fb = 715 5 v 4050 4050 mhz (g = +2) r fb = 715 15 v 5575 5575 mhz (g = +1) r fb = 1000 15 v 4080 4080 mhz (g = +10) r fb = 270 15 v 5065 5065 mhz 0.1 db bandwidth (g = +2) r fb = 715 5 v 1322 1322 mhz (g = +2) r fb = 715 15 v 1530 1530 mhz full power bandwidth v o = 20 v p-p, r l = 400 w 15 v 16 16 mhz slew rate 2 r l = 150 w 5 v 350 350 v/ m s r l = 400 w 15 v 1000 1000 v/ m s settling time to 0.1% 10 v step, g = C1 15 v 50 50 ns settling time to 0.01% 10 v step, g = C1 15 v 125 125 ns differential gain f = 3.58 mhz 15 v 0.02 0.05 0.02 0.05 % f - 3.58 mhz 5 v 0.04 0.07 0.04 0.07 % differential phase f = 3.58 mhz 15 v 0.04 0.07 0.04 0.07 degrees f = 3.58 mhz 5 v 0.045 0.08 0.045 0.08 degrees total harmonic distortion f = 10 mhz, v o = 2 v p-p r l = 400 w , g = +2 15 v C61 C61 dbc input offset voltage 5 v, 15 v 1.5 6 1.5 6 mv t min Ct max 5 v, 15 v 2 7.5 4 15 mv offset voltage drift 715 m v/ c input bias current Cinput t min Ct max 5 v, 15 v 0.7 5 0.8 5 m a +input t min Ct max 5 v, 15 v 2 7.5 2 10 m a open-loop t min Ct max transresistance v o = 10 v, r l = 400 w 15 v 1.0 3.5 1.0 3.5 m w v o = 2.5 v, r l = 100 w 5 v 0.3 1.2 0.2 1.0 m w open-loop t min Ct max dc voltage gain v o = 10 v, r l = 400 w 15 v 86 100 80 100 db v o = 2.5 v, r l = 100 w 5 v 7688 7288 db common-mode rejection t min Ct max v os v cm = 12 v 15 v 5664 5664 db v cm = 2.5 v 5 v 5260 5060 db input current t min Ct max 5 v, 15 v 0.1 0.4 0.1 0.4 m a/v power supply rejection 4.5 v to 18 v v os t min Ct max 65 72 60 72 db input current t min Ct max 0.05 0.3 0.05 0.3 m a/v input voltage noise f = 1 khz 5 v, 15 v 2.9 2.9 nv/ ? hz input current noise Ci in , f = 1 khz 5 v, 15 v 13 13 pa/ ? hz +i in , f = 1 khz 5 v, 15 v 1.5 1.5 pa/ ? hz input common-mode 5 v 2.5 3.0 2.5 3v voltage range 15 v 12 13 12 13 v output characteristics output voltage swing 3 r l = 150 w , t min Ct max 5 v 2.5 2.9 2.5 2.9 v r l = 400 w 15 v 12.5 12.9 12.5 12.9 v r l = 400 w , t min Ct max 15 v 12 12 v short-circuit current 15 v 150 150 ma output current t min Ct max 5 v, 15 v 4060 3060 ma output resistance open loop (5 mhz) 15 15 w input characteristics input resistance +input 15 v 2.5 10 2.5 10 m w Cinput 15 v 40 40 w input capacitance +input 15 v 2 2 pf disable characteristics 4 off isolation f = 5 mhz, see figure 43 64 64 db off output impedance see figure 43 (r f + r g ) i 13 pf (r f + r g ) i 13 pf
absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 . . . . . . . observe derating curves output short circuit duration . . . . observe derating curves common-mode input voltage . . . . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 v storage temperature range plastic dip . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +125 c cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +150 c small outline ic . . . . . . . . . . . . . . . . . . . C65 c to +125 c operating temperature range ad810a . . . . . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c ad810s . . . . . . . . . . . . . . . . . . . . . . . . . . C55 c to +125 c lead temperature range (soldering 60 sec) . . . . . . . +300 c notes 1 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum raring conditions for extended periods may affect device reliability. 2 8-pin plastic package: q ja = 90 c/watt; 8-pin cerdip package: q ja = 110 c/watt; 8-pin soic package: q ja = 150 c/watt. esd susceptibility esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. although the ad810 features esd protection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid any performance degradation or loss of functionality. ordering guide temperature package package model range description option ad810an C40 c to +85 c 8-pin plastic dip n-8 ad810ar C40 c to +85 c 8-pin plastic soic r-8 ad810ar-reel C40 c to +85 c 8-pin plastic soic r-8 5962-9313201mpa C55 c to +125 c 8-pin cerdip q-8 ad810a ad810s 1 parameter conditions v s min typ max min typ max units turn on time 5 z out = low, see figure 54 170 170 ns turn off time z out = high 100 100 ns disable pin current disable pin = 0 v 5 v 5075 5075 m a 15 v 290 400 290 400 m a min disable pin current to disable t min Ct max 5 v, 15 v 30 30 m a power supply operating range +25 c to t max 2.5 18 2.5 18 v t min 3.0 18 3.5 18 v quiescent current 5 v 6.7 7.5 6.7 7.5 ma 15 v 6.8 8.0 6.8 8.0 ma t min Ct max 5 v, 15 v 8.3 10.0 9 11.0 ma power-down current 5 v 1.8 2.3 1.8 2.3 ma 15 v 2.1 2.8 2.1 2.8 ma notes 1 see analog devices military data sheet for 883b specifications. 2 slew rate measurement is based on 10% to 90% rise time with the amplifier configured for a gain of C10. 3 voltage swing is defined as useful operating range, not the saturation range. 4 disable guaranteed break before make. 5 turn on time is defined with 5 v supplies using complementary output cmos to drive the disable pin. specifications subject to change without notice. maximum power dissipation the maximum power that can be safely dissipated by the ad810 is limited by the associated rise in junction temperature. for the plastic packages, the maximum safe junction tempera- ture is 145 c. for the cerdip package, the maximum junction temperature is 175 c. if these maximums are exceeded momen- tarily, proper circuit operation will be restored as soon as the die temperature is reduced. leaving the device in the overheated condition for an extended period can result in device burnout. to ensure proper operation, it is important to observe the derating curves. 2.4 0.4 140 1.0 0.6 ?0 0.8 ?0 1.6 1.2 1.4 1.8 2.0 2.2 120 100 80 60 40 20 0 ?0 total power dissipation ?watts 8-pin mini-dip ambient temperature ? c 8-pin soic 8-pin cerdip 8-pin mini-dip maximum power dissipation vs. temperature while the ad810 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature is not exceeded under all conditions. 1 5 2 3 0.1? +v s 6 ad810 0.1? ? s 10k w see text 7 4 offset null configuration ad810 rev. a C3C
ad810 rev. a C4C 20 5 020 15 10 515 10 0 magnitude of the output voltage ??olts supply voltage ??olts no load r l = 150 w figure 1. input common-mode voltage range vs. supply voltage 35 10 0 10 100 10k 1k 25 5 15 20 30 output voltage ?volts p-p load resistance ?ohms ?5v supply ?v supply figure 3. output voltage swing vs. load resistance ?0 140 ?0 ?0 120 100 80 60 40 20 0 ?0 input bias current ?? junction temperature ? c 10 8 6 4 2 0 ? ? ? ? inverting input v s = ?v, ?5v noninverting input v s = ?v, ?5v figure 5. input bias current vs. temperature Ctypical characteristics 20 5 020 15 10 515 10 0 magnitude of the output voltage ??olts supply voltage ??olts no load r l = 150 w figure 2. output voltage swing vs. supply 10 4 140 7 5 ?0 6 ?0 9 8 120 80 60 40 100 20 0 ?0 supply current ?ma junction temperature ? c v s = ?5v v s = ?v figure 4. supply current vs. junction temperature 10 ? 140 ? ? ?0 ?0 2 ? 4 6 8 120 100 80 60 40 20 0 ?0 input offset voltage ?mv junction temperature ? c 0 ?0 v s = ?5v v s = ?v figure 6. input offset voltage vs. junction temperature
ad810 rev. a C5C 250 50 ?0 +140 200 100 ?0 150 +100 +120 +80 +60 +40 +20 0 ?0 short circuit current ?ma junction temperature ? c v s = ?5v v s = ?v figure 7. short circuit current vs. temperature 10.0 0.01 100k 100m 10m 1m 10k 1.0 0.1 closed-loop output resistance ? w frequency ?hz v s = ?v gain = 2 r f = 715 w v s = ?5v figure 9. closed-loop output resistance vs. frequency 30 15 0 100k 1m 100m 10m 10 5 20 25 frequency ?hz output voltage ?volts p-p output level for 3% thd r l = 400 w v s = ?5v v s = ?v figure 11. large signal frequency response typical characteristicsC 120 20 +140 80 40 ?0 60 ?0 100 +120 +100 +80 +60 +40 +20 0 ?0 output current ?ma junction temperature ? c v s = 15v v s = 5v figure 8. linear output current vs. temperature 100k 10k 1k 100 100k 1m 10m 100m output resistance ? w frequency ?hz 1m figure 10. output resistance vs. frequency, disabled state 100 10 1 100 10 1 10 100 1k 10k 100k inverting input current noise voltage noise frequency ?hz v s = ?v to ?5v noninverting input current noise current noise ?pa/ hz voltage noise ?nv/ hz figure 12. input voltage and current noise vs. frequency
ad810 rev. a C6C Ctypical characteristics 80 40 100k 100m 10m 1m 10k 20 60 50 30 10 70 power supply rejection ?db frequency ?hz curves are for worst case condition where one supply is varied while the other is held constant r f = 715 w a v = +2 v s = ?5v v s = ?v figure 14. power supply rejection vs. frequency ?0 ?40 100 1k 10m 1m 100k 10k ?0 ?0 ?20 ?00 harmonic distortion ?dbc frequency ?hz ?5v supplies gain = +2 r l = 400 w v out = 20v p-p 2nd harmonic 3rd harmonic v out = 2v p-p 2nd 3rd figure 16. harmonic distortion vs. frequency (r l = 400 w ) 1200 200 2 400 800 600 1000 18 16 14 12 10 8 6 4 slew rate ?v/? supply voltage ??olts r l = 400 w gain = ?0 gain = +10 gain = +2 figure 18. slew rate vs. supply voltage 100 60 20 100k 100m 10m 1m 10k 40 80 70 50 30 90 frequency ?hz common-mode rejection ?db figure 13. common-mode rejection vs. frequency ?0 100 1k 10m 1m 100k 10k ?0 ?0 ?20 ?00 harmonic distortion ?dbc frequency ?hz v o = 2v p-p r l = 100 w gain = +2 v s = ?v 2nd harmonic 2nd 3rd v s = ?5v 3rd harmonic figure 15. harmonic distortion vs. frequency (r l = 100 w ) 10 ?0 200 ? ? 20 ? 0 2 ? 0 4 6 8 180 160 140 120 100 80 60 40 output swing from ? to 0v settling time ?ns 0.1% 0.1% 0.01% 0.01% r f = r g = 1k w r l = 400 w figure 17. output swing and error vs. settling time
ad810 rev. a C7C typical characteristics, noninverting connectionC 1v 1v 0% 10 20ns 90 100 v in v o figure 20. small signal pulse response, gain = +1, r f = 1 k w , r l = 150 w , v s = 15 v 0 ? 10 100 ? ? ? ? 1 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 closed-loop gain ?db phase shift ?degrees frequency ?mhz gain = +1 r l = 1k w v s = ?5v ?v ?.5v v s = ?5v ?v ?.5v phase gain figure 22. closed-loop gain and phase vs. frequency, g= +1, r f = 1 k w for 15 v, 910 w for 5 v and 2.5 v 200 60 20 40 120 80 100 140 160 180 ?db bandwidth ?mhz 218 16 14 12 10 8 6 4 supply voltage ??olts peaking 1db peaking 0.1db r f = 750 w r f = 1k w r f = 1.5k w g = +1 r l = 1k w v o = 250mv p-p figure 24. C3 db bandwidth vs. supply voltage g = +1, r l = 1 k w ad810 r f v o to tektronix p6201 fet probe 50 w hp8130 pulse generator r g 7 3 2 3 0.1? +v s 6 ? s 4 0.1? r l v in v o figure 19. noninverting amplifier connection gain = +1 r l = 150 w ?.5v ?v ?.5v phase gain 0 ? 10 100 ? ? ? ? 1 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 closed-loop gain ?db phase shift ?degrees frequency ?mhz ?v v s = ?5v v s = ?5v figure 21. closed-loop gain and phase vs. frequency, g= +1. r f = 1 k w for 15 v, 910 w for 5 v and 2.5 v 110 40 20 30 70 50 60 80 90 100 ?db bandwidth ?mhz 218 16 14 12 10 8 6 4 supply voltage ??olts g = +1 r l = 150 w v o = 250mv p-p peaking 1db r f = 750 w peaking 0.1 db r f = 1k w r f = 1.5k w figure 23. bandwidth vs. supply voltage, gain = +1, r l = 150 w
ad810 rev. a C8C Ctypical characteristics, noninverting connection 90 100 0% 10v 1v 10 50ns v in v o figure 26. large signal pulse response, gain = +10, r f = 442 w , r l = 400 w , v s = 15 v 20 15 10 100 19 18 17 16 21 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 closed-loop gain ?db phase shift?degrees frequency ?mhz gain = +10 r f = 270 w r l = 1k w v s = ?5v ?v ?.5v v s = ?5v ?v ?.5v phase gain figure 28. closed-loop gain and phase vs. frequency, g = +10, r l = 1 k w 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??olts peaking 0.5db peaking 0.1db r f = 232 w r f = 442 w r f = 1k w g = +10 r l = 1k w v o = 250m v p-p figure 30. C3 db bandwidth vs. supply voltage, gain = +10, r l = 1 k w v o 100mv 20ns 1v 100 90 10 0% v in figure 25. small signal pulse response, gain = +10, r f = 442 w , r l = 150 w , v s = 15 v 20 15 10 100 19 18 17 16 21 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 closed-loop gain ?db phase shift ?degrees frequency ?mhz v s = ?5v ?v ?.5v v s = ?5v ?v ?.5v phase gain gain = +10 r f = 270 w r l = 150 w figure 27. closed-loop gain and phase vs. frequency, g = +10, r l = 150 w 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??olts g = +10 r l = 150 w v o = 250mv p-p peaking 0.5db peaking 0.1db r f = 232 w r f = 442 w r f = 1k w figure 29. C3 db bandwidth vs. supply voltage, gain = +10, r l = 150 w
ad810 rev. a C9C typical characteristics, inverting connectionC 90 100 0% 1v 1v 10 20ns v in v o figure 32. small signal pulse response, gain = C1, r f = 681 w , r l = 150 w , v s = 5 v 180 135 90 45 0 ?5 ?0 0 ? 10 100 ? ? ? ? 1 1 1000 gain = ? r l = 1k w v s = ?5v ?v ?.5v v s = ?5v ?v ?.5v frequency ?mhz closed-loop gain ?db phase gain phase shift ?degrees figure 34. closed-loop gain and phase vs. frequency, g = C1, r l = 1 k w , r f = 681 w for v s = 15 v, 620 w for 5 v and 2.5 v 60 20 2 40 120 80 100 140 160 180 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??olts peaking 1.0db peaking 0.1db g = ? r l = 1k w v o = 250mv p-p r f = 500 w r f = 649 w r f = 1k w figure 36. C3 db bandwidth vs. supply voltage, gain = C1, r l = 1 k w ad810 r f v o to tektronix p6201 fet probe hp8130 pulse generator r g 7 3 2 3 0.1? +v s 6 ? s 4 0.1? r l v in v o figure 31. inverting amplifier connection 0 ? 10 100 ? ? ? ? 1 1 1000 180 135 90 45 0 ?5 ?0 gain = ? r l = 150 w v s = ?5v ?v ?.5v v s = ?5v ?v ?.5v frequency ?mhz phase shift ?degrees closed-loop gain ?db phase gain figure 33. closed-loop gain and phase vs. frequency g = C1, r l = 150 w , r f = 681 w for 15 v, 620 w for 5 v and 2.5 v 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??olts peaking 1.0db peaking 0.1db g = ? r l = 150 v o = 250mv p-p r f = 500 w r f = 681 w r f = 1k w figure 35. C3 db bandwidth vs. supply voltage, gain = C1, r l = 150 w
ad810 rev. a C10C Ctypical characteristics, inverting connection 90 0% 1v 100mv 10 20ns 100 v in v o figure 37. small signal pulse response, gain = C10, r f = 442 w , r l = 150 w , v s = 15 v 180 135 90 45 0 ?5 ?0 10 100 1000 gain = ?0 r f = 249 w r l = 150 w v s = ?5v ?v ?.5v v s = ?5v ?v ?.5v frequency ?mhz phase gain phase shift ?degrees 1 20 15 19 18 17 16 21 closed-loop gain ?db figure 39. closed-loop gain and phase vs. frequency, g = C10, r l = 150 w 40 20 30 70 50 60 80 90 100 ?db bandwidth ?mhz 218 16 14 12 10 8 6 4 supply voltage ??olts g = ?0 r l = 150 w v o = 250mv p- p r f = 249 w r f = 442 w r f = 750 w no peaking figure 41. C3 db bandwidth vs. supply voltage, g = C10, r l = 150 w 90 0% 10v 1v 10 50ns 100 v in v o figure 38. large signal pulse response, gain = C10, r f = 442 w , r l = 400 w , v s = 15 v 20 15 19 18 17 16 21 10 100 1000 gain = ?0 r f = 249 w r l = 1k w frequency ?mhz closed-loop gain ?db phase gain 180 135 90 45 0 ?5 ?0 phase shift ?degrees 1 v s = ?5v ?v ?.5v v s = ?5v ?v ?.5v figure 40. closed-loop gain and phase vs. frequency, g = C10, r l = 1 k w 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??olts g = ?0 r l = 1k w v o = 250mv p- p r f = 249 w r f = 442 w r f = 750 w no peaking figure 42. C3 db bandwidth vs. supply voltage, g = C10, r l = 1 k w
ad810 rev. a C11C general design considerations the ad810 is a current feedback amplifier optimized for use in high performance video and data acquisition systems. since it uses a current feedback architecture, its closed-loop bandwidth depends on the value of the feedback resistor. table i below contains recommended resistor values for some useful closed- loop gains and supply voltages. as you can see in the table, the closed-loop bandwidth is not a strong function of gain, as it would be for a voltage feedback amp. the recommended resistor values will result in maximum bandwidths with less than 0.1 db of peaking in the gain vs. frequency response. the C3 db bandwidth is also somewhat dependent on the power supply voltage. lowering the supplies increases the values of internal capacitances, reducing the bandwidth. to compensate for this, smaller values of feedback resistor are sometimes used at lower supply voltages. the characteristic curves illustrate that bandwidths of over 100 mhz on 30 v total and over 50 mhz on 5 v total supplies can be achieved. table i. C3 db bandwidth vs. closed-loop gain and resistance values (r l = 150 v ) v s = 6 15 v closed-loop C3 db bw gain r fb r g (mhz) +1 1 k w 80 +2 715 w 715 w 75 +10 270 w 30 w 65 C1 681 w 681 w 70 C10 249 w 24.9 w 65 v s = 6 5 v closed-loop C3 db bw gain r fb r g (mhz) +1 910 w 50 +2 715 w 715 w 50 +10 270 w 30 w 50 C1 620 w 620 w 55 C10 249 w 24.9 w 50 achieving very flat gain response at high frequency achieving and maintaining gain flatness of better than 0.1 db above 10 mhz is not difficult if the recommended resistor values are used. the following issues should be considered to ensure consistently excellent results. choice of feedback and gain resistor because the 3 db bandwidth depends on the feedback resistor, the fine scale flatness will, to some extent, vary with feedback resistor tolerance. it is recommended that resistors with a 1% tolerance be used if it is desired to maintain exceptional flatness over a wide range of production lots. printed circuit board layout as with all wideband amplifiers, pc board parasitics can affect the overall closed-loop performance. most important are stray capacitances at the output and inverting input nodes. (an added capacitance of 2 pf between the inverting input and ground will add about 0.2 db of peaking in the gain of 2 response, and increase the bandwidth to 105 mhz.) a space (3/16" is plenty) should be left around the signal lines to minimize coupling. also, signal lines connecting the feedback and gain resistors should be short enough so that their associated inductance does not cause high frequency gain errors. line lengths less than 1/4" are recommended. quality of coax cable optimum flatness when driving a coax cable is possible only when the driven cable is terminated at each end with a resistor matching its characteristic impedance. if coax were ideal, then the resulting flatness would not be affected by the length of the cable. while outstanding results can be achieved using inexpensive cables, some variation in flatness due to varying cable lengths is to be expected. power supply bypassing adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. inductance in the power supply leads can contribute to resonant circuits that produce peaking in the amplifier's response. in addition, if large current transients must be delivered to the load, then bypass capacitors (typically greater than 1 m f) will be required to provide the best settling time and lowest distortion. although the recommended 0.1 m f power supply bypass capacitors will be sufficient in most applications, more elaborate bypassing (such as using two paralleled capacitors) may be required in some cases. power supply operating range the ad810 will operate with supplies from 18 v down to about 2.5 v. on 2.5 v the low distortion output voltage swing will be better than 1 v peak to peak. single supply operation can be realized with excellent results by arranging for the input common-mode voltage to be biased at the supply midpoint. offset nulling a 10 k w pot connected between pins 1 and 5, with its wiper connected to v+, can be used to trim out the inverting input current (with about 20 m a of range). for closed-loop gains above about 5, this may not be sufficient to trim the output offset voltage to zero. tie the pot's wiper to ground through a large value resistor (50 k w for 5 v supplies, 150 k w for 15 v supplies) to trim the output to zero at high closed-loop gains. applicationsC
ad810 rev. a C12C capacitive loads when used with the appropriate feedback resistor, the ad810 can drive capacitive loads exceeding 1000 pf directly without oscillation. by using the curves in figure 45 to chose the resistor value, less than 1 db of peaking can easily be achieved without sacrificing much bandwidth. note that the curves were generated for the case of a 10 k w load resistor, for smaller load resistances, the peaking will be less than indicated by figure 45. another method of compensating for large load capacitances is to insert a resistor in series with the loop output as shown in figure 43. in most cases, less than 50 w is all that is needed to achieve an extremely flat gain response. figures 44 to 46 illustrate the outstanding performance that can be achieved when driving a 1000 pf capacitor. ad810 r f r g 7 3 2 3 0.1? +v s 6 ? s 4 0.1? r l v in v o c l r s (optional) r t 1.0? 1.0? figure 43. circuit options for driving a large capacitive load 0 1 10 100 ? ? ? 3 6 9 g = +2 v s = ?5v r l = 10k w c l = 1000pf r f = 750 w r s = 11 w r f = 4.5k w r s = 0 closed-loop gain ?db frequency ?mhz figure 44. performance comparison of two methods for driving a large capacitive load 2k 1k 4k 3k 1 10 100 1000 load capacitance ?pf feedback resistor ? w 0 v s = ?5v gain = +2 r l = 1k w v s = ?v figure 45. max load capacitance for less than 1 db of peaking vs. feedback resistor 90 100 0% 5v 5v 100ns v in v out figure 46. ad810 driving a 1000 pf load, gain = +2, r f = 750 w , r s = 11 w , r l = 10 k w disable mode by pulling the voltage on pin 8 to common (0 v), the ad810 can be put into a disabled state. in this condition, the supply current drops to less than 2.8 ma, the output becomes a high impedance, and there is a high level of isolation from input to output. in the case of a line driver for example, the output impedance will be about the same as for a 1.5 k w resistor (the feedback plus gain resistors) in parallel with a 13 pf capacitor (due to the output) and the input to output isolation will be better than 65 db at 1 mhz. leaving the disable pin disconnected (floating) will leave the ad810 operational in the enabled state. in cases where the amplifier is driving a high impedance load, the input to output isolation will decrease significantly if the input signal is greater than about 1.2 v peak to peak. the isolation can be restored back to the 65 db level by adding a dummy load (say 150 w ) at the amplifier output. this will attenuate the feedthrough signal. (this is not an issue for multiplexer applications where the outputs of multiple ad810s are tied together as long as at least one channel is in the on state.) the input impedance of the disable pin is about 35 k w in parallel with a few pf. when grounded, about 50 m a flows out
ad810 rev. a C13C of the disable the disable pin for 5 v supplies. if driven by complementary output cmos logic (such as the 74hc04), the disable time (until the output goes high impedance) is about 100 ns and the enable time (to low impedance output) is about 170 ns on 5 v supplies. the enable time can be extended to about 750 ns by using open drain logic such as the 74hc05. when operated on 15 v supplies, the ad810 disable pin may be driven by open drain logic such as the 74c906. in this case, adding a 10 k w pull-up resistor from the disable pin to the plus supply will decrease the enable time to about 150 ns. if there is a nonzero voltage present on the amplifier's output at the time it is switched to the disabled state, some additional decay time will be required for the output voltage to relax to zero. the total time for the output to go to zero will generally be about 250 ns and is somewhat dependent on the load impedance. operation as a video line driver the ad810 is designed to offer outstanding performance at closed-loop gains of one or greater. at a gain of 2, the ad810 makes an excellent video line driver. the low differential gain and phase errors and wide C0.1 db bandwidth are nearly independent of supply voltage and load (as seen in figures 49 and 50). ad810 75 w 7 3 2 3 0.1? +v s 6 ? s 4 0.1? v in v out 715 w 75 w cable 75 w 75 w 75 w cable 715 w figure 47. a video line driver operating at a gain of +2 gain = +2 r l = 150 w ?.5v v s = ?5v ?v ?.5v phase gain 0 ? 10 100 ? ? ? ? 1 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 closed-loop gain ?db phase shift ?degrees frequency ?mhz ?v v s = ?5v figure 48. closed-loop gain and phase vs. frequency, g = +2, r l = 150, r f = 715 w 0.10 0 15 0.03 0.01 6 0.02 5 0.06 0.04 0.05 0.07 0.08 0.09 14 13 12 11 10 9 8 7 0.20 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 gain phase gain = +2 r f = 715 w r l = 150 w f c = 3.58mhz 100 ire modulated ramp supply voltage ??volts differential gain ?% differential phase ?degrees figure 49. differential gain and phase vs. supply voltage 100k 1m 100m 10m +0.1 0 ?.1 ?.1 0 +0.1 normalized gain ?db frequency ?hz r l = 150 w r l = 1k ?5v ?v ?5v ?v ?.5 ?.5 figure 50. fine-scale gain (normalized) vs. frequency for various supply voltages, gain = +2, r f = 715 w 110 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage - ?olts peaking 1.0db peaking 0.1db g = +2 r l = 150 w v o = 250mv p-p r f = 500 r f = 750 r f = 1k figure 51. C3 db bandwidth vs. supply voltage, gain = +2, r l = 150 w
ad810 rev. a C14C 2:1 video multiplexer the outputs of two ad810s can be wired together to form a 2:1 mux without degrading the flatness of the gain response. figure 54 shows a recommended configuration which results in C0.1 db bandwidth of 20 mhz and off channel isolation of 77 db at 10 mhz on 5 v supplies. the time to switch between channels is about 0.75 m s when the disable pins are driven by open drain output logic. adding pull-up resistors to the logic outputs or using complementary output logic (such as the 74hc04) reduces the switching time to about 180 ns. the switching time is only slightly affected by the signal level. 10 90 100 0% 5v 500mv 500ns figure 52. channel switching time for the 2:1 mux ?0 ?0 1 10 100 ?0 ?0 ?0 ?0 feedthrough ?db frequency ?mhz figure 53. 2:1 mux off channel feedthrough vs. frequency ad810 7 3 2 3 0.1? +5v 6 v in a 750 w ?v 4 0.1? 8 v sw v out 75 w 75 w cable 74hc04 ad810 7 3 2 3 0.1? +5v 6 v in b ?v 4 0.1? 8 75 w 750 w 750 w 750 w 75 w 75 w figure 54. a fast switching 2:1 video mux ?.5 ?.0 1 10 100 ?.0 ?.5 ?.0 ?.5 0 0.5 0 ?5 ?0 ?35 ?80 ?25 ?70 phase gain closed-loop gain ?db phase shift ?degrees frequency ?mhz v s = ?v figure 55. 2:1 mux on channel gain and phase vs. frequency
ad810 rev. a C15C n:1 multiplexer a multiplexer of arbitrary size can be formed by combining the desired number of ad810s together with the appropriate selection logic. the schematic in figure 58 shows a recommendation for a 4:1 mux which may be useful for driving a high impedance such as the input to a video a/d converter (such as the ad773). the output series resistors effectively compensate for the combined output capacitance of the off channels plus the input capacitance of the a/d while maintaining wide bandwidth. in the case illustrated, the C0.1 db bandwidth is about 20 mhz with no peaking. switching time and off channel isolation (for the 4:1 mux) are about 250 ns and 60 db at 10 mhz, respectively. ?.5 ?.0 1 10 100 ?.0 ?.5 ?.0 ?.5 0 0.5 0 ?5 ?0 ?35 ?80 ?25 phase gain closed-loop gain ?db phase shift ?degrees frequency ?mhz v s = ?5v r l = 10k w c l = 10pf figure 56. 4:1 mux on channel gain and phase vs. frequency ?0 1 10 100 ?0 ?0 ?0 ?0 feedthrough ?db frequency ?mhz figure 57. 4:1 mux off channel feedthrough vs. frequency ad810 75 w 7 2 3 0.1? +v s 6 1k w ? s 4 0.1? 8 select a ad810 7 2 3 0.1? +v s 6 ? s 4 0.1? 8 select d ad810 7 2 3 0.1? +v s 6 ? s 4 0.1? 8 select c ad810 7 2 3 0.1? +v s 6 ? s 4 0.1? 8 select b 33 w v out r l c l v in , a v in , b v in , c v in , d 75 w 1k w 33 w 75 w 1k w 33 w 75 w 1k w 33 w figure 58. a 4:1 multiplexer driving a high impedance
ad810 rev. a C16C outline dimensions dimensions shown in inches and (mm). plastic mini-dip (n) package 0.011 ?.003 (0.28 ?.08) 0.30 (7.62) ref 15 0 pin 1 4 5 8 1 0.25 (6.35) 0.31 (7.87) 0.10 (2.54) bsc seating plane 0.035 ?.01 (0.89 ?.25) 0.18 ?.03 (4.57 ?.76) 0.033 (0.84) nom 0.018 ?.003 (0.46 ?.08) 0.125 (3.18) min 0.165 ?.01 (4.19 ?.25) 0.39 (9.91) max cerdip (q) package 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) 15 0 0.005 (0.13) min 0.055 (1.40) max 1 pin 1 4 5 8 0.310 (7.87) 0.220 (5.59) 0.405 (10.29) max 0.200 (5.08) max seating plane 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.100 (2.54) bsc 8-pin soic (r) package 0.019 (0.48) 0.014 (0.36) 0.050 (1.27) bsc 0.102 (2.59) 0.094 (2.39) 0.197 (5.01) 0.189 (4.80) 0.010 (0.25) 0.004 (0.10) 0.098 (0.2482) 0.075 (0.1905) 0.190 (4.82) 0.170 (4.32) 0.030 (0.76) 0.018 (0.46) 10 0 0.090 (2.29) 8 0 0.020 (0.051) x 45 chamf 1 8 5 4 pin 1 0.157 (3.99) 0.150 (3.81) 0.244 (6.20) 0.228 (5.79) 0.150 (3.81) all brand or product names mentioned are trademarks or registered trademarks of their respective holders. c1737C24C10/92 printed in u.s.a.
package/price information for detailed packaging information, please select the datasheets button. low power video op amp with disable ?model? status package description pin count temperature range price* (100-499) ?5962-9313201mpa? ?production? ?cerdip glass seal? ?8? ?military? ?$17.01? ?AD810ACHIPS? ?production? ?chips/die sales? - ?industrial? ?$2.30? ?ad810an? ?production? ?plastic/epoxy dip? ?8? ?industrial? ?$2.55? ?ad810ar? ?production? ?std s.o. pkg (soic)? ?8? ?industrial? ?$2.55? ?ad810ar-reel? ?production? ?std s.o. pkg (soic)? ?8? ?industrial? - ?ad810ar-reel7? ?production? ?std s.o. pkg (soic)? ?8? ?industrial? - * this price is provided for budgetary purposes as recommended list price in u.s. dollars per unit the stated volume. pricing displayed for evaluation boards and kits is based on 1-piece pricing. view pricing and availability (currently available to north american customers) for further information. analog products -- ad810 file:///k|/export/projects/bitting2/imaging/bitting/mail_pdf/20010521/11may2001/html/ad810.html [5/21/2001 11:39:17 am]

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